Did I just say that digital logic is the building block of today's technology? OK, I wish I could change the topic to "transistors, resistors and capacitors, the building blocks of today's technology" but that would mean saying the same thing since logic gates are derived from the trio. Logic gates are electronic components that have single or multiple input with a single output.
[image source pixabay. CC0 creative commons license]
On a very basic level, the basic logic gates consists of the "OR", "AND" and "NOT" gate. From a symbolic perspective, the OR gate consists of two inputs and a single output with an inward curve on the input end. It takes in two values (either a high or low, a “1” represents the high while “0” represents the low) and gives a logical high if and only if, at least one of the inputs is high. The OR gate can have more than two inputs but the minimum number of input to the OR gate is two. Similarly, the AND gate takes in a minimum of two inputs and gives a logical high if none of the inputs are low.
The NOT gate differs from both the AND and OR gate in the sense that it takes in a single input and produces a single logic output which is always the negative of the input. Hence, when we send an electrical signal into the NOT gate, we’ll have no signal at the output and when there are not electrical signal in the input, we’ll have electrical signal at the output.
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basic logic gates and their realization components. Image credit Wikimedia. Image by DnetSvg. Creative Commons Attribution 3.0 Unported license.
Apart from the basic logic gates, we have the universal logic gates which are derived from combinations of the basic logic gates, these include the NAND, NOR, XOR, and XNOR. The NAND gate is realized by combining the NOT gate and the AND gate above with two or more input and a single output.
The output of the NAND gate will be low if and only if, all the input signals are high, clearly, this is not the behavior of any of the basic logic gates. Similarly, the NOR gate is realized as the combination of both the OR gate and the NOT gate. It also takes in two or more inputs and a single output. Here, the output of the logic NOR, will only be low when all the inputs are high, again, this is the behavior of any basic logic gates.
Someone might ask, what can one achieve with such a simple electronic component? Heard about the arithmetic logic unit (ALU), the part of our processor that carries out all our calculations? The AND gate, for example is synonymous to multiplication while the OR gate is synonymous to addition while the NOT gate is used for negation purposes. The two basic logic gates could be used to carry out other mathematical operations and can be used to derive other operators, for instance, the multiplication can be arrived at by continuous addition.
Apart from being used in processor’s ALU, the transistor, resistor and capacitor integrations in integrated circuits are implemented in the form of logic gates. From their basic forms, it is obvious they can be interconnected to realize important circuits like the sequential logic circuits like the program counters and shift registers. If this does not make sense, think of the volume up and down buttons on the remote control of your television, by pressing the volume up button, you increase the “current” state of the volume from its “initial” state, hence, sequential logic circuits produces outputs which are dependent on both the present and past input conditions.
The Transistor-Transistor Logic
Leaving the theoretical plane to a practical plane, the implementations of the logic gates are usually in the form of TTL as transistor-transistor logic are fondly called or the complementary metal-oxide semiconductor logic, resistor transistor logic, diode transistor logic and so on. The popular ones being the TTL and the CMOS.
Just as the name suggests, the transistor transistor logic is realized as a combination of junction diodes, bipolar junction transistors and integrated circuit resistors. The integrated circuit resistors microscopic resistors found in integrated circuits and are produced as a result of diffusion operations on part of the semiconductor substrates used in designing the IC, hence, they are also referred to as, diffused resistors.
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Realizing at TTL using NAND gate. Image credit Wikimedia. Image by MichaelFrey. Creative Commons Attribution-Share Alike 2.0 Germany license.
Though PNP transistors are used in TTL ICs, NPN bipolar junction transistors are mostly used for the transistor transistor logic ICs.
The circuit realization of a typical TTL using NAND gate is shown in the figure to the left. As stated above, only NPN BJT transistors are used to realize the integration. The input of the circuit is from a two NPN transistors with common base and emitter terminal.
This type of configuration is also known as the open collector output logic. The behavior of the input can be liken to a collection of diodes which are conventionally placed end to end, hence, if any of the input terminal (A or B) is low, the emitter and base junctions will be in forward bias and this results in little current flowing to the resistor at the base end of the common base and emitter input transistor. This little current will not be enough to power the resistor and also bias the two immediate transistors making the output signal (Y) to be in the same potential as VCC.
Also when both input terminals are high, the transistor at the input is said to be in reverse bias mode making the voltage drop at the emitter and base junction to be very small with all the voltage leaving the base, hence, there’s enough current at resistor enough to bias the two immediate transistors. In fact, the current at the two transistors are high enough to put the transistors in a saturation mode, this makes the two transistors to act as a short circuit dropping all the voltage with no voltage reaching the output. This is said to be logical low and is a characteristics of the NAND gate explained above.
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a bit slice arithmetic logic unit (ALU), implemented as a 7400 series TTL integrated circuit. Image credit Wikimedia. Image by BruceBlaus. Creative Commons license.
There are three types of TTL integration which are high power TTL, low power TTL and Schottky TTL. The high power TTL was designed with mainly fast switching in mind but dissipates lots of heat. The low power TTL is opposite of the high power TTL because, it has reduced switching speed and reduced power consumption and dissipation.
The schottky TTL logic derived its name from the configuration of the transistors used in its implementation. Here, the speed of operation is more than that of the high power TTL with no increase in power consumption, this is because of the presence of schottky diode which is connected at the base collector junction of the transistors used in its implementation.
The complementary metal-oxide semiconductor logic
In part 7 of this series, I explained in detail, the operations of the field effect transistors and complementary metal-oxide semiconductor transistor was a major part of the discuss. Just like other types of FETs, the CMOS are voltage controlled unlike the BJTs which are current controlled. Also, the CMOS are easily miniaturized making them the best type of transistor for large scale integration.
One of the major disadvantages of the TTL transistors is the floating output which makes it difficult to sink the current of devices connected to their output. This is not the case for the CMOS logic circuits since the transistors acts partly as a pull-up circuit which perfectly separates operating current from load current.
The term “complementary” means the combination of two insulated gate field effect transistors, the N-channel MOSFETs and the P-channel MOSFETs. The field effect transistors consists of three terminals; the gate, the drain and the source, with a channel existing between the source and the drain while the gate controls this channel. The insulated gate field effect transistors are known as “normally open” devices because a voltage applied at the gate and the source terminal creates a channel which forms a conductivity between the source and the drain so long there’s applied voltage at the gate.
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Image credit Wikimedia. Image by Tosaka. Creative Commons Attribution 3.0 Unported license.
Though CMOS are good transistors since they practically operates either in their saturated region (acting as a short circuit) or in their cutoff regions (acting as a switch) but they can build up electrostatic charges at their input terminals due to high input voltages which could ultimately affect the whole output thereby giving an output of high instead of low or vice versa. A common fix for this issue is to float the input terminals which helps in keeping the input voltage in check.
CMOS logic can be implemented using either NAND gate or NOR gates. The diagram of the implementation using NAND gate is shown in the image to the right.
Here, the two transistors, Q1 and Q3 are connected in a series fashion making it possible to be controlled by the same input voltage, (A). Similarly, the two transistors, Q2 and Q4 are also controlled by the same input voltage (B). The effect of this is that when one transistor is in forward bias, the other is in reverse bias, making each pair (Q1 and Q2) to be high when the rest are low (Q3 and Q4).
For four possible input logic combination, the output will be as shown below:
| Input (A) | Input (B) | Output (Y) |
|---|---|---|
| low | low | high |
| low | high | high |
| high | low | high |
| high | high | low |
The above logic results corresponds to the operation of NAND gates. This type of circuits are widely used in the realization of AND gates because inverting these results would produce a logic multiplication.
The implementation of the CMOS logic using NOR gates is similar to the explanation and the circuit above with the same voltage controlling transistors Q1 and Q2, Q3 and Q4. The only difference is that both Q1 and Q2 are sourced in a series manner (connected to voltage source) while Q3 and Q4 are sinked in parallel manner (connected to the ground potentials).
Voltage levels in logic gates
I've made mention of lots of "high" and "low" but the question is, how "high" is high and how "low" is low? There are varieties of logic circuits referred to as "logic family" and the amount of voltage required to perform switching in these logic family also varies but I will consider this section in a very general manner. For readability, the "high" state is often written as "1" to represent the presence of input or output signal while the "low" state is often written "0" to indicate the absence of input or output signal.
Circuit implementation of logic gates just like many other digital circuits, mostly takes voltage input in the range of 3 volts to 5 volts as “high” or “1” while voltages below 1 volts (0.8volts for TTL implementations) is considered “low” or “0”. CMOS circuits are more resilient, taking voltages up to 18 volts as “high” input.
REFERENCES
- digital logic gates -electronical4u
- logic gates -electronics-tutorial
- Transistor transistor logic -electronical4u
- transistor transistor logic -elprocus
- CMOS digital logic -fourier
- CMOS logic gates -elprocus
- CMOS gate circuitary -allaboutcircuits
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awesome post
I understood better from here
Don't know much about electronics, but I bet this will fascinate my best friend who happens to be a computer freak
👍
Thanks buddy
@henrychidiebere you are giving best information electronics
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